In data centers and telecommunication infrastructure, 56 and 112 Gbps PAM-4 signaling is the latest development in serial data signal formats. Implementation of high data rate protocols such as PAM-4 require a clean channel (i.e., low signal-to-noise ratios). Compared to PCB materials, BiPass I/O Cable Assemblies dramatically reduce insertion loss between the ASIC and the front panel I/O, creating greater channel margins.

As signal integrity becomes paramount, data center and network designers can no longer utilize inexpensive FR4 material. Yet, better-performing PCB materials come at a price premium. BiPass I/O Cable Assemblies reduce the overall signal integrity requirements of the main PCB by removing the sensitive high-speed signals via twinax.

With the move to PAM-4, ASICs used in data centers and networks are being asked to do more, resulting in increased energy consumption. As a result, designers have turned to installing retimers on the main PCB or have relied upon them in the active optical transceivers to enable a “turning down” of the ASIC. However, this only shifts the energy consumption from the ASIC to the retimers. BiPass I/O Cable Assemblies eliminate the need for retimers in the channel. Because of the superior signal integrity performance, ASICs can do more with less power.