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NearStack PCIe Connector System

NearStack PCIe Connector System and Cable Jumper Assemblies use twinax cables to deliver a PCB alternative and have been optimized for height, PCB density and robustness while enabling implementation of PCIe Gen-5 32-Gbps data rates.

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Data Rate Impedance Wire AWG
PCIe Gen 5 (32 Gbps NRZ) 85 Ohms 30 AWG twinax
34 AWG sideband wire

NearStack PCIe High-Speed I/O Connectors

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NearStack PCIe High-Speed I/O Cable Assemblies

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Features and Benefits

As system architects design high-speed signal channels from one side of a system to the other, they face obstacles that become increasingly challenging to overcome at higher frequencies. The NearStack PCIe Connector System and Cable Jumper Assemblies transmit signals directly from point A to point B, avoiding traces on expensive PCBs with superior signal integrity performance.

Our customers are tasked with enabling the full capabilities of new generations of CPUs to their end users. This requires increasing connectivity within servers and storage hardware. NearStack PCIe Connectors are designed with density in mind, allowing for minimal footprint and maximization of routing flexibility. Additionally, the low-profile height minimizes negative impact on systems’ thermal performance.

With specific pinout requirements and signal integrity targets, a solution is needed to support next-generation PCIe Gen-5 system implementation. From the outset of development, the NearStack PCIe Connector System and Cable Jumper Assemblies have targeted specific support of the PCIe standard, incorporating design elements to ensure pinout and signal integrity requirements are met.

High-quality signal transmission

The NearStack PCIe Connector System and Cable Jumper Assemblies create a direct connection from anywhere in the system to near the ASIC, improving SI, lowering insertion loss and reducing signal latency. Additionally, the direct-to-contact termination strategy eliminates the paddle card from the cable assembly, which enables more repeatable and reliable automation.

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Alleviated space constraints

With a small pitch and reduced mated height, the NearStack PCIe Connector takes up minimal space within the system, alleviating space constraints. Additionally, the use of cable jumpers may enable customers to avoid costly PCBs and could reduce the PCB layer count.

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PCIe standard support

Designed to help ensure PCIe pinout and signal integrity requirements are met, customers can utilize the NearStack PCIe Connector System for Gen-5 implementation.

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Integrated metal latch on cable connector
Engages with metal cage on the PCB connector creating a robust positive latch when mated; also offered with a pull tab release feature.

Unique contact interface with flexing beams on NearStack cable receptacle
No chance for pre-loaded beam relaxation through reflow.
Less potential for damage to hard-to-rework PCB side. Reduced stub lengths compare to traditional cantilever on PCB pad.

Metal shroud on plug
Allows for positive thumb latch interface and solder tail attachment, and provides rugged, reliable PCB retention.

x8 version available, which is a single-bay, two-wafer connector
Delivers 18 differential pairs (GSSGSSG) and 16 single-ended signals (72-pins total).
Single ground between DPs maximizes density.

Direct-to-contact weld termination with wires welded directly to signal contact
Removes paddle card from the assembly, and produces highly repeatable assemblies for predictable SI results.

Protected interface
Signal pins are protected from “scoop” mating and angled misalignment of up to 6°.

Datasheets and Guides

Videos and Podcasts

NearStack PCIe Connectors and Cable Assemblies

The Continuing Evolution of Faster Data Rates in Data Centers

Applications by Industry

Accelerator hardware
High-performance computing
PCIe
Servers
Storage